The present invention relates to a method for manufacturing a non-volatile memory device, and more particularly to a method for manufacturing a non-volatile memory device having a plurality of charge storing regions for each word gate.
Non-volatile semiconductor memory devices include a MONOS (Metal Oxide Nitride Oxide Semiconductor) type and a SONOS (Silicon Oxide Nitride Oxide Silicon) type in which a gate dielectric layer between a channel region and a control gate is composed of a stacked layered body of a silicon oxide layerxe2x80x94a silicon nitride layerxe2x80x94a silicon oxide layer, wherein a charge is trapped in the silicon nitride layer.
One known MONOS type non-volatile memory device is shown in FIG. 14 (H. Hayashi, et al, 2000 Symposium on VLSI Technology Digest of Technical Papers p.122-p.123).
The MONOS type memory cell 100 has a word gate 14 formed over a semiconductor substrate 10 through a first gate dielectric layer 12. Also, a first control gate 20 and a second control gate 30 in the form of sidewalls are disposed on both sides of the word gate 14. A second gate dielectric layer 22 is present between a bottom section of the first control gate 20 and the semiconductor substrate 10, and a dielectric layer 24 is present between a side surface of the first control gate 20 and the word gate 14. Similarly, a second gate dielectric layer 22 is present between a bottom section of the second control gate 30 and the semiconductor substrate 10, and a dielectric layer 24 is present between a side surface of the second control gate 30 and the word gate 14. Impurity layers 16 and 18 that each compose a source region or a drain region are formed in the semiconductor substrate 10 between the opposing control gates 20 and 30 of adjacent memory cells.
In this manner, each memory cell 100 includes two MONOS type memory elements on the side surfaces of the word gate 14. Also, these MONOS type memory elements are independently controlled. Therefore, a single memory cell 100 can store 2-bit information.
One object of the present invention is to provide a method for manufacturing a MONOS type non-volatile memory device having a plurality of charge storing regions.
A method for manufacturing a non-volatile memory device in accordance with one embodiment of the present invention comprises the following steps. A first dielectric layer is formed above a semiconductor layer, a first conductive layer is formed above the first dielectric layer, and a stopper layer is formed above the first conductive layer. The stopper layer and the first conductive layer are then patterned. An ONO film composed of a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer is formed above the semiconductor layer and on both sides of the first conductive layer. A second conductive layer is then formed above the ONO film. Next, the second conductive layer is anisotropically etched, and then the second conductive layer is isotropically etched to form sidewall-like control gates on both side surfaces of the first conductive layer through the ONO film. An impurity layer that is to become a source region or a drain region is then formed in the semiconductor layer. Next, a second dielectric layer is formed over an entire surface of the substrate. The second dielectric layer is then polished such that the stopper layer is exposed and then the stopper layer is removed. Finally, the first conductive layer is patterned to form a word gate.